When light is confined and propagating on the surface of a metal, it is called a surface plasmon polariton, and it is a result of interaction between electrical-magnetic field of light and collective oscillations of surface charge (surface plasmon). Surface plasmon polariton (SPP) is best known for its sub-wavelength spatial confinement down to nanometer scale, as such, SPP is compatible with electronics, and can be used for nanoscale optical communication on chip level between transistors. An effort is currently being made to integrate electric circuits with nanophotonic circuits, i.e., plasmonic circuits, or in an electric circuit analog, to combine the size efficiency of electronics with the data capacity of photonic integrated circuits. Plasmonics can be understood as “light-on-metal-dielectric-interfaces,” where electrons oscillate at the surface of a metal due to strong interactions with the electric field of incident light.
Electronic photonic/plasmonic integrated circuits (EPICs) are considered to have great potential in both electronics and photonics communities because an EPIC takes advantage of high-speed optical communication and highly integrated fast electronics. EPICs have been regarded as next generation technology that can potentially go beyond silicon and Moore's law. However, the realization of EPIC has remained challenging even after decades of research effort because of issues such as the need for optical communication at nanometer scales. There is no existing technology that allows successful fabrication of EPICs on a chip-scale because of material limitation and device design.
Systems and methods for EPICs discussed herein demonstrate how a new generation of integrated circuits can be fabricated.